By Topic

A high-performance pipelined architecture for measurement and monitoring of multiple sensor signals

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Rotithor, H.G. ; Dept. of Electr. Eng., Worcester Polytech. Inst., MA, USA

A high-performance pipelined architecture with hardware sharing for measurement and monitoring of signals generated by sensors that measure physical quantities is presented. Pipelining provides the necessary computational power and has potential for minimizing the input sampling to output monitoring delay, while hardware sharing results in a lower cost. The three segments in the pipeline are: sample acquisition, sample processing, and output monitoring. Each segment is implemented using one or more microprocessors. Various considerations involved in the design of a pipelined architecture are discussed, and a simple model to predict the computing power required and the maximum delay incurred for an application is presented

Published in:

Instrumentation and Measurement, IEEE Transactions on  (Volume:41 ,  Issue: 6 )