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Fabrication of sub-micron CMOS-SOS devices using direct-write electron beam lithography

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6 Author(s)
Brown, A.G. ; R. Signals & Radar Establ., Malvern, UK ; Mortimer, S.H. ; Till, S.J. ; Willis, H.
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In any advanced CMOS process, certain lithographic stages will require the highest resolution, namely the definition of the gates and gate interconnect contact holes and second interconnect layer. Therefore, electron beam lithography has been used at RSRE to produce CMOS-SOS devices with sub-micron gate dimensions. The performance of such devices will be used in future work to identify the processing requirements that will be needed for fully scaled sub-micron SOS transistors

Published in:

Sub-Micron Silicon Engineering, IEE Colloquium on

Date of Conference:

9 May 1989