By Topic

Implementation of real coefficient two-dimensional denominator-separable digital filters based on decomposition techniques

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $33
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
D. Raghuramireddy ; Lehrstuhl fur Allgemeine und Theor. Elektrotech., Erlangen-Nurnberg Univ., Germany ; R. Unbehauen

In the paper, the implementation of two-dimensional digital filters is dealt with for the processing of real sequences. The approach is based on decomposition techniques to obtain separable one-dimensional polynomials from a two-dimensional polynomial, and then one-dimensional techniques are used to express the one-dimensional transfer functions as a sum of two reduced-order transfer functions with complex coefficients. Thus, new realisation structures are obtained for the equivalent reduced-order complex-coefficient transfer functions for the processing of real sequences. The authors concentrate more on two-dimensional denominator-separable digital filters and also confine themselves to the parallel-form structures as the emphasis is now on low data throughput delay and high parallelism due to recent advances in VLSI technology. All these structures consist only of one-dimensional first-order minimum-norm sections. Thus, these structures possess low roundoff noise and freedom from overflow limit cycles. A comparison of different structures is made based on data throughput delay, efficiency in multiprocessor environment and roundoff noise properties.<>

Published in:

IEE Proceedings G - Circuits, Devices and Systems  (Volume:140 ,  Issue: 1 )