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Systolic array based concurrent processing for real-time high performance control

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2 Author(s)
Rogers, E. ; Div. of Dynamics & Control, Strathclyde Univ., Glasgow, UK ; Yun Li

Concurrent processing techniques are applied to real-time high-performance control problems. In particular, four shortest-latency systolic array architectures are developed for controller implementation in such problems at word level. A technique termed `M-expanded pipelining' is used to pipeline these architectures to an arbitrary deeper level. Some preliminary results concerning the expected performance of these architectures are presented

Published in:

Decision and Control, 1988., Proceedings of the 27th IEEE Conference on

Date of Conference:

7-9 Dec 1988