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An integrated GaAs n-p-n-p thyristor/JFET memory cell exhibiting nondestructive read

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3 Author(s)
Hetherington, D.L. ; Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA ; Klem, J.F. ; Weaver, Harry T.

An integrated GaAs n-p-n-p thyristor-junction field effect transistor (JFET) structure displays memory by storing charge on the thyristor reverse-biased junctions. The device can be electrically programmed and erased through a single terminal. A buried p-channel, which also functions as the thyristor anode, is used to read stored charge nondestructively over a small range of applied drain voltages (+or-1.5 V). Measured storage times exceeded 10 s at room temperature with an activation energy of approximately 0.6 eV.<>

Published in:

Electron Device Letters, IEEE  (Volume:13 ,  Issue: 9 )