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Intermetal dielectric-induced N-field device failure in double-level-metal CMOS process

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6 Author(s)
Kuo, H.H. ; Taiwan Semiconductor Manuf. Co., Hsin-Chu, Taiwan ; Lin, K.M. ; Liu, C.M. ; Tsai, R.
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In double-level-metal CMOS production processes, the silicate-based spin-on-glass (SOG) planarization scheme, even without a nitride passivation layer, is observed to cause N-field device failure which appears to be due to positive charges trapped in the SOG sandwich layer. Ultraviolet (UV) exposure and backbias are found to be able to eliminate the field and active device leakage. A mechanism is proposed to explain the formation of the positive charges and the UV curing phenomena.<>

Published in:

Electron Device Letters, IEEE  (Volume:13 ,  Issue: 8 )