By Topic

CHIPAIDE: a new approach to analogue integrated circuit design

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $33
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

9 Author(s)
C. A. Makris ; Dept. of Electr. Eng., Imperial Coll., London, UK ; C. M. Berrah ; X. Xiao ; M. Singha
more authors

The prospect of fully automated analogue circuit design by a system whose input is a performance specification and whose output is a mask set, has attracted the attention of researchers for many years, and a few developmental systems are already in existence. The aim of this paper is to describe, necessarily in outline, the CHIPAIDE system currently being developed at Imperial College. Like some other systems, CHIPAIDE contains a knowledge-based circuit generation module and a layout generation module. However, if differs from other systems in the algorithmic bases of these modules, in the inclusion of optimisation and tolerance design modules and, principally, in the close interaction that occurs between the four modules which comprise the CHIPAIDE system. Each module is separately described

Published in:

Analogue VLSI, IEE Colloquium on

Date of Conference:

10 May 1990