Cart (Loading....) | Create Account
Close category search window
 

A case study of two-stage fault location

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Ryan, P. ; Intel Corp., Folsom, CA, USA ; Davis, K. ; Rawat, S.

An industrial implementation of two-stage VLSI fault location is presented. Two-stage fault location was developed to address the size and computation time problems that were making it impractical to automate fault location with fault dictionaries. It does this by reducing the fault list and the test vector set for each faulty chip before dynamically creating a new, small fault dictionary for each diagnosis. The modern fault dictionary and the two-stage fault location technique are explained. For the case study presented, a new Intel chip was chosen. Its test set was developed and fault simulated, and it was prepared for automated fault location. Two-stage fault location was then applied to the fourteen failures available from initial product development production runs. The results are presented.<>

Published in:

Reliability Physics Symposium 1992. 30th Annual Proceedings., International

Date of Conference:

March 31 1992-April 2 1992

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.