An algorithm is presented for the minimal state-space realization of a two-dimensional (2-D) transfer function for the special case when the numerator or the denominator of the 2-D transfer function is factorable. The state-space representation is directly derived by inspection from a circuit block diagram realization of the 2-D system. The algorithm does not require that the numerator or the denominator polynomial be factored out, as opposed to other known techniques
Published in:
Circuits and Systems, IEEE Transactions on
(Volume:35
,
Issue:
8
)
Date of Publication: Aug 1988