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Application of Boolean unification to combinational logic synthesis

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4 Author(s)
M. Fujita ; Fujitsu Laboratories Ltd., Kawasaki, Japan ; Y. Tamiya ; Y. Kukimoto ; K. -C. Chen

The authors present various applications of Boolean unification to combinational logic synthesis. Three topics of combinational logic synthesis are discussed: redesign, multilevel logic minimization, and minimization of Boolean relations. All of these problems can be uniformly formalized as Boolean unification problems. Experimental results are also reported.<>

Published in:

Computer-Aided Design, 1991. ICCAD-91. Digest of Technical Papers., 1991 IEEE International Conference on

Date of Conference:

11-14 Nov. 1991