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HIVE: an efficient interconnect capacitance extractor to support submicron multilevel interconnect designs

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3 Author(s)
Chang, K.-J. ; Hewlett-Parkard Co., Palo Alto, CA, USA ; Oh, S.-Y. ; Lee, K.

A novel paradigm for efficiently providing 2-D and 3-D submicron multilevel (SMML) interconnect capacitances to support VLSI/ULSI designs regarding RC delay, electromigration, and crosstalk has been developed. According to SMML interconnect process measurements and simulations, when the interconnect width/space changes, the corresponding changes of the ground and coupling capacitances are linear in some cases and nonlinear in other cases. A set of representative SMML layout structures is selected so that rigorous 2-D and 3-D simulations are done for the nonlinear changes in advance, and fast interpolations/extrapolations are done for the linear changes when circuit designers specify the width/space of interconnects.<>

Published in:

Computer-Aided Design, 1991. ICCAD-91. Digest of Technical Papers., 1991 IEEE International Conference on

Date of Conference:

11-14 Nov. 1991