By Topic

Comments on "A module generator for optimized CMOS buffers

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
N. Hedenstierna ; Dept. of Solid-State Electron., Chalmers Univ., Goteborg, Sweden ; K. O. Jeppson

For the original article see ibid., vol.9, no.10, p.1028-46 (1990). In the above-titled paper A.J. Al-Khalili et al. claim that the expression derived by the commenters (1987) for the short-circuit energy dissipation per transition for a CMOS inverter while the n-channel transistor is discharging the load capacitor is not correct, and they suggest that some mistakes were made during the integration. The commenters point out that a rederivation showed that their expression is correct, and even if it is given for equal p- and n-channel transistors, it can easily be generalized to arbitrary p- and n-channel transistor sizes.<>

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:12 ,  Issue: 1 )