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A possible realisation of switched-capacitor integrators using delay-line elements is presented. Although parasitic sensitive, the proposed switched-capacitor integrator allows higher-frequency operation, dissipates less DC power and occupies less chip area that its counterpart using an operational amplifier. The realisation and simulation result of a second-order delta-sigma modulator employing the proposed integrators are also included.
Date of Publication: 21 Jan. 1993