A possible realisation of switched-capacitor integrators using delay-line elements is presented. Although parasitic sensitive, the proposed switched-capacitor integrator allows higher-frequency operation, dissipates less DC power and occupies less chip area that its counterpart using an operational amplifier. The realisation and simulation result of a second-order delta-sigma modulator employing the proposed integrators are also included.
Published in:
Electronics Letters
(Volume:29
,
Issue:
2
)
Date of Publication: 21 Jan. 1993