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A 2-ns detecting time, 2-μm CMOS built-in current sensing circuit

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3 Author(s)
Tung-Li Shen ; United Microelectronics Corp., Hsinchu City, Taiwan ; Daly, J.C. ; Lo, J.-C.

Built-in current testing is known to enhance the defect coverage in CMOS VLSI. An experimental CMOS chip containing a high-speed built-in current sensing (BICS) circuit design is described. This chip has been fabricated through MOSIS 2-μm p-well CMOS technology. The power bus current of an 8×8 parallel multiplier is monitored. This BICS detects all implanted short-circuit defects and some implanted open-circuit defects at a clock speed of 30 MHz (limited by the test setup). SPICE3 simulations indicate a defect detection time of about 2 ns

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Solid-State Circuits, IEEE Journal of  (Volume:28 ,  Issue: 1 )