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Implementation of a defect-tolerant large area monolithic multiprocessor system

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4 Author(s)
Kuboschek, M. ; Lab. fuer Informationstechnol., Hannover Univ., Germany ; Iden, H.-J. ; Jagau, U. ; Otterstedt, J.

A defect-tolerant large area integrated circuit 16 cm2 in size was implemented. It contains the test and configuration frame for a MIMD (multiple instruction, multiple data) multiprocessor architecture for video signal processing. The emphasis was on the development of a new automatic configuration network for the interconnection of functional modules. The straightforward test and configuration approach avoids external online computation of patterns to be applied. To solve the problem of getting access to the modules, the bring-up procedure of the networks is performed automatically by a defect-tolerant scan test under defect-tolerant control, followed by randomly performed configuration trials. This procedure has been shown to be highly effective. By using a fail-safe design of vital hardware components, like configuration nodes and control units, their fault susceptibility was decreased by a factor of three

Published in:

Wafer Scale Integration, 1992. Proceedings., [4th] International Conference on

Date of Conference:

22-24 Jan 1992