By Topic

Component-Level Measurement for Transient-Induced Latch-up in CMOS ICs Under System-Level ESD Considerations

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Ming-Dou Ker ; Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu ; Sheng-Fu Hsu

To accurately evaluate the immunity of CMOS ICs against transient-induced latch-up (TLU) under the system-level electrostatic discharge (ESD) test for electromagnetic compatibility (EMC) regulation, an efficient component-level TLU measurement setup with bipolar (underdamped sinusoidal) trigger is developed in this paper. A current-blocking diode and a current-limiting resistance, which are generally suggested to be used in the TLU measurement setup with bipolar trigger, are investigated for their impacts to both the bipolar trigger waveforms and the TLU immunity of the device under test (DUT). All the experimental results have been successfully verified with device simulation. Finally, a TLU measurement setup without a current-blocking diode but with a small current-limiting resistance, which can accurately evaluate the TLU immunity of CMOS ICs with neither overestimation nor electrical-over-stress damage to the DUT during the TLU test, is suggested. The suggested measurement setup has been verified with silicon-controlled-rectifier test structures and real circuitry (ring oscillator) fabricated in 0.25-mum CMOS technology

Published in:

Device and Materials Reliability, IEEE Transactions on  (Volume:6 ,  Issue: 3 )