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This paper presents a complete electrical analysis of address decoder delay faults "ADFs" caused by resistive opens in RAMs. A classification between inter and intragate opens is made. A systematic way is introduced to explore the space of possible tests to detect these faults; it is based on generating appropriate sensitizing address transitions and the corresponding sensitizing operation sequences. DFT features are given to facilitate the BIST implementation of the new tests
Published in:
Computers, IEEE Transactions on
(Volume:55
,
Issue:
12
)
Date of Publication: Dec. 2006
- Page(s):
- 1630 - 1639
- ISSN :
- 0018-9340
- INSPEC Accession Number:
- 9245961
- Digital Object Identifier :
- 10.1109/TC.2006.203
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 30 October 2006
- Issue Date :
- Dec. 2006
- Sponsored by :
- IEEE Computer Society
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