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Selective Epitaxial Si/SiGe for VT Shift Adjustment in High k pMOS Devices

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8 Author(s)

This work discusses the influence of the underlying SiGe on the growth kinetics during the deposition of the Si-cap layer. The importance and feasibility of the required process control is demonstrated by charge pumping measurements and energy dispersive X-ray spectroscopy (EDX) on pMOS devices. The analysis clearly demonstrates the influence of the Si thickness on the quality of the gate dielectric/channel interface. We also discuss the presence of thermal loading effects, by comparing the growth behavior with and without Si recess prior to the SEG

Published in:

SiGe Technology and Device Meeting, 2006. ISTDM 2006. Third International

Date of Conference:

15-17 May 2006

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