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High-CMRR Current Amplifier Architecture and Its CMOS Implementation

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4 Author(s)
S. Pennisi ; Dipt. di Ingegneria Elettrica, Elettronica e dei Sistemi, Catania Univ. ; M. Piccioni ; G. Scotti ; A. Trifiletti

A novel current operational amplifier, in which the traditionally adopted input current follower is replaced by an input stage that exhibits current gain and single-input-to-differential-output conversion, is presented. Due to this, increased values of both dc gain and common-mode rejection ratio (CMRR) are obtained in the overall amplifier. A CMOS implementation, along with postlayout simulations, which are in good agreement with expected data, is also included. The proposed design is supplied with 2.5 V, dissipates 0.7 mW, and provides a nominal dc gain, a gain-bandwidth product, and a CMRR (at dc) of 72 dB, 28 MHz, and greater than 100 dB, respectively

Published in:

IEEE Transactions on Circuits and Systems II: Express Briefs  (Volume:53 ,  Issue: 10 )