By Topic

Time-Interleaved Multirate Sigma–Delta Modulators

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Colodro, F. ; Univ. de Sevilla ; Torralba, A. ; Laguna, M.

A time-interleaved (TI) implementation of multirate sigma-delta modulators (SDMs) is proposed. In multirate SDMs, the first integrator is clocked at a rate that is lower than that of the rest of the integrators. In the proposed architecture, each integrator clocked at a high rate is replaced by two parallel integrators operating in interleaved mode and clocked at the same low rate as the first one. The new architecture has several nice features. First, every integrator operates at the same low rate, which simplifies the clock circuitry when compared to the original multirate modulator. Second, there are no delayed cross paths, which is typical of TI-SDMs. Third, no high-rate sample-and-hold at the input of a TI-SDM is required. Finally, as time interleaving is not applied to the first integrator, the proposed modulator is robust against circuit mismatches, unlike other TI architectures. The same strategy can be applied to continuous time (CT) modulators. To the authors' knowledge, this is the first TI-CT-SDM ever reported

Published in:

Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:53 ,  Issue: 10 )