By Topic

A Space Vector PWM Scheme to Reduce Common Mode Voltage for a Cascaded Multilevel Inverter

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

Multilevel inverters generate common mode voltage similar to two-level inverters. Schemes have been reported for multilevel inverters to reduce the common mode voltage. However, most of the schemes result in reduced modulation depth, high switching losses and high harmonic distortion. This paper proposes a simple space vector PWM scheme to reduce common mode voltage for cascaded multilevel inverter and addresses these issues. The scheme is explained for 5-level inverter. The scheme can be easily extended to a n-level inverter. Both experimental and simulation results are provided

Published in:

Power Electronics Specialists Conference, 2006. PESC '06. 37th IEEE

Date of Conference:

18-22 June 2006