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Adaptive Multiple-Resolution CMOS Active Pixel Sensor

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2 Author(s)
Artyomov, E. ; Ben-Gurion Univ. of the Negev, Beer-Sheva ; Yadid-Pecht, O.

A smart image sensor with adaptive multiple resolution ability is presented. This sensor is based on the quadtree decomposition algorithm, which decomposes an image into square homogeneous regions. After the image is segmented, only the value of the block and its size are stored or transmitted. On-chip implementation can solve the information bottleneck problem by reducing the amount of data for transmission. Good compression results can be achieved for scenes with predominant and homogeneous backgrounds. The algorithm is implemented on chip in a mixed-signal column parallel architecture in 0.35-mum 4M2P n-well TSMC CMOS technology available through MOSIS. Typical power dissipation for the test chip with 32times32 pixels is 70 mW at VDD=3.3 V

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Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:53 ,  Issue: 10 )