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Multi-Band (1-6GHz), Sampled, Sliding-IF Receiver with Discrete-Time Filtering in 90nm Digital CMOS Process

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10 Author(s)
Lakdawala, H. ; Commun. Technol. Lab., Intel Corp., Hillsboro, OR ; Zhan, J. ; Ravi, A. ; Anderson, S.
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A prototype 1-6GHz multi-band sampled sliding-IF receiver with discrete-time channel select filtering in a 90nm low resistivity substrate, strained-Si digital CMOS process is presented. The core receiver has an inductor-less wideband LNA front-end, a sampled mixer, and a combination of programmable poly-phase FIR and IIR filter for baseband filtering. The receiver achieves a noise figure (NF) of <13.5dB and IIP3 of >-19dBm for bands between 1-6GHz. The receiver when used in a system with an external tuned LNA (2.5dB NF) on the front end module achieves NF of <7dB, and IIP3 of >-34dBm for the WiFi bands. The die area for the entire receiver is 0.8mm2 and consumes 89mW

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VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on

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