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Integration of Self-Formed Barrier Technology for 32nm-Node Cu Dual-Damascene Interconnects with Hybrid Low-k (PAr/SiOC) Structure

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7 Author(s)
Ohoka, Y. ; Semicond. Bus. Unit, Sony Corp., Atsugi ; Inoue, K. ; Hayashi, T. ; Komai, N.
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Self-formed MnOx barrier technology has been successfully integrated for 150nm pitch Cu dual-damascene interconnects with PAr/SiOC (k=2.65) hybrid structure. Barrier formation at the interface of Cu and various low-k films with few Si or O was confirmed by adhesion, XPS and TEM/EDX analyses. No degradation of interconnect performance and excellent electromigration lifetime were verified. It is concluded that this self-formed barrier technology is a promising technique to satisfy the reliability requirement for 32nm-node Cu/low-k interconnects

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VLSI Technology, 2006. Digest of Technical Papers. 2006 Symposium on

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