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SONOS-Type FinFET Device Using P+ Poly-Si Gate and High-k Blocking Dielectric Integrated on Cell Array and GSL/SSL for Multi-Gigabit NAND Flash Memory

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14 Author(s)
Suk-Kang Sung ; Device Res. Team, Samsung Electron. Co., Gyeonggi ; Se-Hoon Lee ; Byung Yong Choi ; Jong Jin Lee
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For the multi-gigabit NAND flash memory, SONOS-type FinFET device with p+ gate and high-k blocking dielectric has been integrated both on the cell array and GSL/SSL for the first time. The advantages of the FinFET structure for the NAND flash application have been theoretically and experimentally demonstrated, and the results show that the 85 % improved on-cell current is achievable using FinFET device. The enhanced programming and retention characteristics of FinFET have been also presented, and modeled by the potential changes on fully-depleted body of the sub-40 nm ultra-narrow fin

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VLSI Technology, 2006. Digest of Technical Papers. 2006 Symposium on

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