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Strained N-Channel FinFETs with 25 nm Gate Length and Silicon-Carbon Source/Drain Regions for Performance Enhancement

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9 Author(s)
Tsung-Yang Liow ; Dept. of Electr. & Comput. Eng., Singapore Nat. Univ. ; Kian-Ming Tan ; Lee, R. ; Anyan Du
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We report the demonstration of 25 nm gate length LG tri-gate FinFETs with Si0.99C0.01 source and drain (S/D) regions. The strain-induced mobility enhancement due to the Si0.99C0.01 S/D leads to a drive current IDsat improvement of 20% at a fixed off-state current Ioff of 1times10-7 A/mum. With additional channel strain engineering, FinFETs incorporating Si0.99C0.01 S/D and a tensile-stress silicon nitride (SiN) capping etch-stop layer (ESL) achieve an IDsat enhancement of 56%

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VLSI Technology, 2006. Digest of Technical Papers. 2006 Symposium on

Date of Conference: 0-0 0

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