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A 1-V, 5.5-GHz, CMOS LNA With Multiple Magnetic Feedback

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4 Author(s)
Vitzilaios, G. ; Sch. of Electr. & Comput. Eng., Athens Nat. Tech. Univ. ; Papananos, Y. ; Theodoratos, G. ; Vasilopoulos, A.

A CMOS low-noise amplifier that utilizes multiple monolithic transformer magnetic feedback to simultaneously neutralize the gate-drain overlap capacitance of the amplifying transistor and achieve high gain at high frequencies when driving an on-chip capacitance is presented. The multiple transformer topology permits negative and positive feedback to be applied constructively, allowing for a stable design with adequate gain and large reverse isolation without noise figure (NF) degradation. Simulation results indicate voltage conversion gain of 17 dB, NF of 1.6 dB, and best-case third-order input intercept point of 13 dBm. The design is being implemented in a 0.13-mum CMOS technology

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Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:53 ,  Issue: 9 )