Design and Analysis of an Ultrahigh-Speed Glitch-Free Fully Differential Charge Pump With Minimum Output Current Variation and Accurate Matching

An ultrahigh-speed fully differential charge pump with minimum current mismatch and variation is proposed in this brief. A mismatch suppression circuit is employed to minimize the mismatch between the charging and discharging currents, which minimizes the steady-state phase error in a phase-locked loop (PLL). A variation suppression circuit is proposed to minimize output current variation with the change of output voltage, which reduces the variation of the bandwidth in a PLL. Techniques are proposed to suppress both low-speed glitches and high-speed glitches in the output current to allow glitch-free operation of the charge pump with ultrafast input pulses. The differential charge pump is designed and simulated under the power supply of 3.3 V in TSMC 0.35-mum CMOS technology to verify the effectiveness of the proposed techniques