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Design of computationally efficient interpolated FIR filters

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3 Author(s)
T. Saramaki ; Dept. of Electr. Eng., Tampere Univ. of Technol., Finland ; T. Neuvo ; S. K. Mitra

The number of multipliers required in the implementation of interpolated FIR (Finite-impulse response) filters in the form H(Z)=F(zL)G( z) is studied. Both single-stage and multistage implementations of G(z) are considered. Optimal decompositions requiring fewest number if multipliers are given for some representative low-pass cases. An efficient algorithm for designing these filters is described. It is based on iteratively designing F(z L) and G(z) using the Remez multiple-exchange algorithm until the difference between the successive stages is within the given tolerance limits. A novel implementation for G(z) based on the use of recursive running sums is given. The design of this class of filters is converted into another design problem to which the Remez algorithm is directly applicable. The results show that the proposed methods result in significant improvements over conventional multiplier efficient implementations of FIR digital filters

Published in:

IEEE Transactions on Circuits and Systems  (Volume:35 ,  Issue: 1 )