Using Reo for formal specification and verification of system designs

In this paper, we introduce a component-based approach to specify and verify system-level designs. A coordination language, Reo, is used to support hierarchical design and verification. We move from functional specification to implementation through different levels of abstraction, considering TLM/RTL mixed levels and hardware/software co-designs. We discuss the mapping of a system design written in SystemC to Reo circuits, and how we can compositionally construct its behavior using constraint automata. A case study is used to show the applicability of our approach