Referenced Items are not available for this document.
This paper analyzes the behavior of interconnects in the highly structured environment of a network-on-chip (NoC). Two distinct classes of wires are considered, namely links between adjacent routers and links between a router and an attached processing element (PE). Analytical models for global router-to-router links and semi-global router-to-PE links are studied. Power and performance optimizations are obtained for each of these two classes of interconnections
Published in:
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Date of Conference: 21-24 May 2006
- Print ISBN:
- 0-7803-9389-9
- INSPEC Accession Number:
- 9055507
- Conference Location :
- Island of Kos
- Digital Object Identifier :
- 10.1109/ISCAS.2006.1693546
- Product Type:
- Conference Publications
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