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On-line calibration of offset and gain mismatch in time-interleaved ADC using a sampled-data chaotic bit-stream

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4 Author(s)
A. Cabrini ; Dept. of Electron., Pavia Univ., Italy ; F. Maloberti ; R. Rovatti ; G. Setti

The offset and gain error of ADCs represent two important limits for time-interleaved ADC architectures. The proposed method enables a precise measurement of the offset and the gain during system operation introducing a minimum disturb at the output. The method exploits the modulation of the input signal with a random sequence of +1 and -1. The random bit-stream is generated by using the wide-band output of a time-discrete non-linear circuit. The resulting spread spectrum signal can be easily distinguished by the DC offset and the use of a digital accumulator extracts the offset and the gain of each ADC. The input signal is finally reconstructed, in the digital domain, with a synchronous demodulation. The accumulation time can be as many clock periods (like 106) thus permitting an excellent accuracy in the offset and gain measurement. Simulations of the proposed approach at the behavioral level confirm the effectiveness of the method. It is shown that the offset of a 12-bit ADC can be measured with a 0.1 LSB accuracy

Published in:

2006 IEEE International Symposium on Circuits and Systems

Date of Conference:

21-24 May 2006