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A novel loss compensation technique for broadband CMOS distributed amplifiers

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2 Author(s)
Moez, K.K. ; Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont. ; Elmasry, M.I.

This paper presents a novel loss compensation technique, an active negative resistor produced by a capacitively source degenerated configuration, to improve the gain flatness and bandwidth of CMOS distributed amplifiers (DAs). This configuration provides the desired isolation from the transmission line at lower frequencies, and a frequency-increasing negative conductance that can fully compensate for the loss of the on-chip inductor over a broad frequency band. A 40 GHZ three-stage 0.13 mum CMOS DA is devised that outperforms previously published CMOS DAs by providing a large gain-bandwidth product of 200 GHz-dB with an improved gain-flatness of plusmn0.2 dB. The proposed loss compensated DA dissipates 24 mW from a 1.2 VDC supply

Published in:

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Date of Conference:

21-24 May 2006