On a design of crossroad switches for low-power on-chip communication architectures

As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. We first propose a novel 2D segmented interconnect architecture, which uses crossroad switches to dynamically construct a dedicated communication path between any two cores. We then present two application-specific bus operation schemes (normal mode and lease line mode). Each switch may operate with a "lease line", which can dynamically offer a dedicated path between two highly-communicative cores for a specific period according to the application characteristics. Finally, we present a concept of wrappers to help designers use our crossroad architecture as communication backbone. We take the JPEG and MPEG4 reference codes as our case studies and experimental results show the power consumptions can be saved if we dynamically control NoC switches when the behavior of the embedded software is well-known