By Topic

Developing Embedded Kernel for System-On-a-Chip Platform of Heterogeneous Multiprocessor Architecture

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Jing Chen ; National Cheng Kung University, Taiwan, R.O.C. ; Jian-Hong Liu

It has been common that modern embedded system products are built on platforms with system-on-a-chip (SOC) in which two or more different processor cores are put into one single chip and form the architecture of heterogeneous multiprocessor. Although providing high performance at low cost, such architecture brings new design challenges as well as increased complexity in developing embedded software especially at the level of kernel or operating system software. This paper presents our experience in developing an embedded microkernel that runs on embedded system of heterogeneous multiprocessor architecture composed of one general purpose processor (GPP) and one special purpose processor (SPP). Aside from following the traditional approach of monolithic operating system, the option of dual kernels based on microkernel architecture with uniform message-passing mechanism was taken to develop a symmetric embedded microkernel which can be compiled to run separately on each of the different processor cores in the system. The design and the approach not only reduce the software complexity in developing a kernel to manage different processors in a system but also enable a symmetric view from processors of different architectures. A prototype kernel was implemented on a reference design of Texas Instrument's TMS320DSC25 which is a heterogeneous multiprocessor SOC with a GPP of ARM7TDMI core and an SPP of C5409 DSP core

Published in:

12th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'06)

Date of Conference:

0-0 0