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Multi-Bank Main Memory Architecture with Dynamic Voltage Frequency Scaling for System Energy Optimization

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3 Author(s)
Fradj, H.B. ; Lab. d''Informatique, Signaux et Syst. de Sophia-Antipolis, Sophia-Antipos ; Belleudy, C. ; Auguin, M.

Several techniques were developed to reduce processor consumption which was the predominant source of dissipation. However with the technology evolution and the development of new applications that make heavy use of large memory data size, the energy savings obtained by these techniques become limited. In this article we showed that dynamic voltage frequency scaling technique (DVFS) increases the main memory consumption. A multi-banked memory architecture, having the capability of setting banks in low power modes when they are not accessed, is adopted to reduce the memory consumption. An approach of tasks allocation and banks configuration reducing the memory energy is developed at system level for multi-task and real-time systems. Experimental results show that, when we combined DVFS technique with an efficient multi-bank architecture and tasks to banks allocation, a system energy saving that reaches 35% is obtained

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Digital System Design: Architectures, Methods and Tools, 2006. DSD 2006. 9th EUROMICRO Conference on

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