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A reconfigurable CMOS iinager for real-time, spatio-ternporal image processing with on-chip ADC

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3 Author(s)
G. N. Angotzi ; Department of Electrical and Electronic Engineering, University of Cagliari, Piazza d'Armi, 09123 Cagliari (Italy). Email: g.angotzi@diee.unica.it ; M. Barbaro ; L. Raffo

A low-power, CMOS imager with real-time, spatio-temporal processing capabilities is presented. An active pixel sensor array for image acquisition is coupled to an analog reconfigurable row processor which can extract both temporal and spatial features. A/D conversion is implemented on-chip at the end of each column. A 256 times 256 pixel array with a frame rate of 50 frames/sec was designed and successfully simulated both pre- and post-layout

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2006 Ph.D. Research in Microelectronics and Electronics

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