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Evaluation of Hierarchical FPGA partitioning methodologies based on architecture Rent Parameter

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3 Author(s)
Marrakchi, Z. ; Dept. ASIM-LIP6, Univ. Paris ; Mrabet, H. ; Mehrez, H.

The complexity of circuits to implement on FPGA has necessitated to explore hierarchical interconnect architectures. A large body of work shows that a good partitioning hierarchy, as measured by the associated rent parameter, will correspond to an area-efficient layout. We define the architecture rent parameter of a netlist to be the lowest bound on the rent parameter of any partitioning hierarchy of the netlist. Experimental results show that a combination between a multilevel bottom-up clustering and a top-down refinement generates partitioning hierarchies whose rent parameters are lower than those of other methods

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Research in Microelectronics and Electronics 2006, Ph. D.

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