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Mapping an obstacles detection, stereo vision-based, software application on a multi-processor system-on-chip

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6 Author(s)
A. Greiner ; UPMC/LIP6, 4, place Jussieu, 75005 Paris, France. Email: alain.greiner@lip6.fr ; F. Petrot ; M. Carrier ; M. Benabdenbi
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In this paper, we present the implementation of a multi-threaded software application for pre-crash obstacle detection, using stereo vision, and the "V-disparity" algorithm, that requires intensive computation. This application runs on a generic, low cost, massively parallel, multi-processor system-on-chip (MP-SoC). This hardware architecture is suitable for automotive area with respect to performance, cost, and flexibility constraints. This hardware/software embedded application is able to process 40 stereoscopic pairs per second with 256 lines of 512 pixels images and a disparity range of 256. Our architecture is made of 8 clusters, 30 general-purpose 32-bit processors and 750 Kbytes embedded memory

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2006 IEEE Intelligent Vehicles Symposium

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