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On the Implementation of Failure-Tolerant Counters

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1 Author(s)

Abstract—A new method of designing and implementing intrinsically failure-tolerant counters with error-correcting state assignments is proposed. Threshold logic elements are used, and state recovery circuitry is united with the flip-flop input logic. A decimal counter built according to this method requires considerably fewer components and has a lower probability of failure at less cost than a diode logic version.

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Computers, IEEE Transactions on  (Volume:C-17 ,  Issue: 9 )