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An Algorithm for Synthesis of Multiple-Output Combinational Logic

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2 Author(s)

Abstract—A computer-oriented algorithm for synthesizing combinational logic circuits from a collection of functionally packaged circuits is developed. The algorithm uses a hierarchy of "goals" in an iterative decision process in a manner similar to that employed by theorem proving and gamne playing programs. With each iteration a set of "tasks" finds the circuit package which satisfies the highest level goal while meeting circuit constraints.

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Computers, IEEE Transactions on  (Volume:C-17 ,  Issue: 2 )