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A programmable logic array suitable for use in digital system design laboratories

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3 Author(s)
K. Abe ; Dept. of Comput. Sci. & Inf. Math., Univ. of Electro-Commun., Tokyo, Japan ; T. Omori ; M. Naraoka

A specially designed programmable logic array (PLA) suitable for use in digital system design laboratories for undergraduates is presented. Rewriting the PLA is done just by transferring the new codes; no explicit erasing process is required. The number of product terms allowed implementation on the PLA is unlimited. The computation speed of the PLA is less than 100 ns. The PLA can communicate with a host computer by accepting a variety of commands for writing PLA codes and monitoring input and output values for the PLA. Using software tools developed for the PLA, the student can perform laboratory experiments at various levels. Another software tool permits programming the PLA in a high-level language. The excitation (next-state) and output functions of a controller circuit are naturally described in a simple syntactic construct. Laboratory experiments utilizing the PLA and student responses are also given

Published in:

IEEE Transactions on Education  (Volume:35 ,  Issue: 4 )