An Efficient Thermal Design Method Based on Boundary Condition Modeling

Until recently, layout design methods for electronic devices such as large scale integration circuits (LSIs) have been considered strictly from the viewpoint of electrical circuit design. In the near future, however, electronic system design will also require thermal design as well. Current thermal layout design is treated as power distribution in electrical layout design. But, evaluation of thermal design is not power density. That is a temperature of the chip. In the process, the designer faces problems. Evaluation of temperature needs the thermal analysis. And, the thermal analysis is slower than electrical evaluation. This, in turn, accentuates the need to accelerate thermal analysis and design methods. We have been investigating a novel high-speed thermal management method for the upper-stream of electronic device layout design on modules when the designer is interested in narrowing down possible design solutions. This method has four features, i.e., 1) division of elements on modules by the boundary conditions, 2) high-speed thermal analysis (10-mus order), 3) division of design by inter-module boundary conditions to three design layers, and 4) automatic identification of regions in design space that satisfy the design constraints. As an illustration, we performed a layout design of a board with four device modules mounted on top with 16 design parameters. Our method achieves the very fast design time (150 s) with 4*10
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