Cart (Loading....) | Create Account
Close category search window

Noise Performance of 0.13 \mu m CMOS Technologies for Detector Front-End Applications

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Manghisoni, M. ; Dipt. di Ingegneria Industriale, Universita di Bergamo, Dalmine ; Ratti, L. ; Re, V. ; Speziali, V.
more authors

Submicron CMOS technologies provide well-established solutions to the implementation of low noise front-end electronics for a wide range of detector applications. In recent years high performance mixed signal circuits were fabricated in 0.35 mum and 0.25 mum processes. Presently the IC designers' effort is gradually shifting to 0.13 mum technologies, following the trend of commercial silicon foundries. Since commercial CMOS processes maintain a steady trend in device scaling, it is essential to monitor the impact of these technological advances on the noise parameters of the devices. To estimate the noise limits of a front-end system in the 0.13 mum node, this work presents the results of noise measurements carried out on NMOS and PMOS devices in two commercial processes from different foundries. The behavior of the 1/f and white noise terms is studied as a function of the device polarity and of the gate length and width to account for different detector requirements. The study is focused on low current density applications where devices are biased in weak or moderate inversion. Data obtained from the measurements provide a powerful tool to model noise parameters and establish front-end design criteria in a 0.13 mum CMOS process

Published in:

Nuclear Science, IEEE Transactions on  (Volume:53 ,  Issue: 4 )

Date of Publication:

Aug. 2006

Need Help?

IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.