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A Low-Power Digit-Based Reconfigurable FIR Filter

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2 Author(s)
Kuan-Hung Chen ; Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei ; Tzi-Dar Chiueh

In this brief, we present a digit-reconfigurable finite-impulse response (FIR) filter architecture with a very fine granularity. It provides a flexible yet compact and low-power solution to FIR filters with a wide range of precision and tap length. Based on the proposed architecture, an 8-digit reconfigurable FIR filter chip is implemented in a single-poly quadruple-metal 0.35-mum CMOS technology. Measurement results show that the fabricated chip operates up to 86 MHz when the filter draws 16.5 mW of power from a 2.5-V power supply

Published in:

Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:53 ,  Issue: 8 )

Date of Publication:

Aug. 2006

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