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MOSFET ESD Breakdown Modeling and Parameter Extraction in Advanced CMOS Technologies

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3 Author(s)
Vassilev, V. ; Silicon Technol. Dev., Texas Instrum. Inc., Dallas, TX ; Lorenzini, M. ; Groeseneken, G.

This paper describes an approach for modeling the breakdown and snapback behavior of state-of-the-art MOSFET structures using equivalent-circuit description. Such models are required to enable circuit-level electrostatic discharge reliability simulations, which are a major challenge for the industry nowadays. Special attention is given to accurately describing the junction and gate leakage currents due to the increased tunneling generation in the scaled-down CMOS. Consistent parameter extraction procedures for the model parameters are described as well

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Electron Devices, IEEE Transactions on  (Volume:53 ,  Issue: 9 )