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A Signed Bit-Sequential Multiplier

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2 Author(s)

Bit-sequential algorithms for arithmetic processing are good candidates for VLSI signal processing circuits because of their canonical structure and minimal interconnection requirements. Several recent papers have dealt with algorithms that accept unsigned binary inputs, one bit at a time, least significant bit first, and produce an unsigned binary product in a bit-serial fashion.

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Computers, IEEE Transactions on  (Volume:C-35 ,  Issue: 10 )