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Concurrent Fault Detection in Microprogrammed Control Units

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2 Author(s)
Iyengar, V.S. ; IBM T. J. Watson Research Center ; Kinney, L.L.

This paper specifies procedures for defining a monitor circuit that can detect faults in microprogram sequencers. The monitor and the sequencer operate in parallel and errors are detected by comparing outputs from the monitor circuit with outputs from the sequencer. Faults that cause errors in the flow of control are detectable, as well as some faults that cause errors only in the microinstruction fields. The design procedure presented for monitors consists of four parts. First, a model of the program flow is constructed that only retains the information required to define a monitor. Second, faults in a specified fault set are modeled by the errors they cause in the program flow model. Third, the functional requirements of the monitor are specified in terms of partitions on the states of the program flow model. Fourth, the logic design of the monitor is completed.

Published in:

Computers, IEEE Transactions on  (Volume:C-34 ,  Issue: 9 )