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Capability Based Tagged Architectures

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1 Author(s)
Lopriore, L. ; Istituto di Elaborazione dell''Informazione, Consiglio Nazionale delle Ricerche

An architecture is presented which incorporates capability based addressing and memory tagging features. It defines three kinds of mechanisms for the implementation of object types, which correspond to as many different levels of abstraction. At the lower level, there are the machine types, the operations of which are implemented by machine instructions. At the upper level, there are user types, the operations of which are concretized by means of software routines. The intermediate level is that of predefined types; in this case, too, the operations are supported by software routines, but their efficiency of execution is much greater than is usually to be found in operations of user types. However, one drawback is that these routines should be proved to be correct, as they have a potential for corrupting the integrity of the whole protection system.

Published in:

Computers, IEEE Transactions on  (Volume:C-33 ,  Issue: 9 )