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A Two's Complement Array Multiplier Using True Values of the Operands

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3 Author(s)
Bandeira, N. ; Department of Electrical and Computer Engineering, University of California ; Vaccaro, K. ; Howard, J.A.

A new algorithm for implementing the two's complement multiplication of an m × n bit number is described. By interpreting certain positive partial product bits as negative, a parallel array is developed which has the advantage of using only one type of adder cell. A comparison with the Pezaris and Baugh-Wooley arrays is presented, showing that the new array is as fast as the Pezaris array and uses less hardware than the Baugh-Wooley implementation.

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Computers, IEEE Transactions on  (Volume:C-32 ,  Issue: 8 )